1. Field of the Invention
The present invention relates to a semiconductor device, particularly to the packaging technology of the semiconductor device.
2. Description of the Related Art
Semiconductor packages (semiconductor devices) have been employed in a variety of information technology devices such as large-scale computers, personal computers, portable devices, etc. Accompanying the high functionality of these devices, the quantity of elements such as semiconductor parts and wiring leads etc. to be installed in the device has increased annually. This has entailed an increase in the mounting area of the semiconductor package which inhibits decreasing the size of the devices. For this reason, chip size package (CSP) technology has been developed in which a semiconductor package is constructed in the same size as a semiconductor chip and multiple semiconductor chips are mounted on a mounting board.
Regarding this chip-sized semiconductor package, a variety of techniques has been proposed to improve the reliability of internal lead wires. For example, JP Hei 11-312772 describes a structure in which the lead wire is protected by bending the wire in a half-wave form. Further, JP 2001-332645 describes a structure for protecting a lead wire through the use of a dummy lead.
In a semiconductor package, in addition, an occasion can occur in which heat generation brought about by variation of the ambient temperature and/or operation of the device causes heat load on the semiconductor package. The amount of thermal expansion between the semiconductor package and mounting board can differ and if the heat load is applied, then a case can occur in which the heat load causes stress on the solder joint between the semiconductor package and mounting board. In this case, a low-elasticity member, for example, an elastomer etc., is arranged as a stress buffer member within the semiconductor package, and when the heat load is applied, deformation of the stress buffer member acts to absorb the difference of the amounts of the thermal distortion between the semiconductor package and mounting board. In this way, the reliability of the solder joint between the semiconductor package and mounting board can be improved. In this arrangement, however, if deformation of the stress buffer member increases, stress affects the lead wire within the package, which causes concern that a break in the lead wire may occur.